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# Eletronica 1 Malvino 7ed Respostas (em ingles)

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```of
2 V, and 376 mV/\u3bcs, with a frequency of 30 kHz.
a. OP-07A
b. TL082 and TL084
c. LM12
d. OP-64E
e. OP-07A
CMRR = 38 dB (from Fig. 18-6a)
MPP = 21 V (from Fig. 18-6b)
Av = 1000 (from Fig. 18-6c)
18-20. Given:
R1 = 10 k\u2126
R2 = 20 k\u2126
R3 = 40 k\u2126
Rf(max) = 100 k\u2126
Rf(min) = 100 k\u2126
v1 = 50 mVpp
v1 = 90 mVpp
v1 = 160 mVpp
Solution: When the resistance is zero, the voltage gains
are zero and the output voltage is zero.
\u2013Av1(CL)max = \u2013Rf /R1 (Eq. 18-3)
\u2013Av1(CL)max = \u2013100 k\u2126/10 k\u2126
\u2013Av1(CL)max = \u201310
\u2013Av2(CL)max = \u2013Rf /R1 (Eq. 18-3)
\u2013Av2(CL)max = \u2013100 k\u2126/20 k\u2126
\u2013Av2(CL)max = \u20135
\u2013Av3(CL)max = \u2013Rf /R1 (Eq. 18-3)
\u2013Av3(CL)max = \u2013100 k\u2126/40 k\u2126
\u2013Av3(CL)max = \u20132.5
vout = Av1(CL)max(vin1) + Av2(CL)max(vin2) + Av3(CL)max(vin3)
vout = \u201310(50 mVpp) + 5(90 mVpp) + 2.5(160 mVpp)
vout = \u20131.35 Vpp
Answer: The maximum output voltage is 1.35 Vpp, and
the minimum output voltage is zero.
18-21. Given:
R1 = 220 \u2126
RF1 = 47 k\u2126
RF2 = 18 k\u2126
RF3 = 39 k\u2126
Solution:
\u2013Av1(CL) = \u2013RF1/R1 (Eq. 18-3)
\u2013Av1(CL) = \u201347 k\u2126/220 \u2126
\u2013Av1(CL) = \u2013214
\u2013Av2(CL) = \u2013RF2/R1 (Eq. 18-3)
\u2013Av2(CL) = \u201318 k\u2126/220 \u2126
\u2013Av2(CL) = \u201382
\u2013Av3(CL) = \u2013RF3/R1 (Eq. 18-3)
\u2013Av3(CL) = \u201339 k\u2126/220 \u2126
\u2013Av3(CL) = \u2013177
Solution: The gain at position 1 is 214, at position 2 is
82, and at position 3 is 177.
18-22. Given:
R1 = 6 k\u2126 at position 2
R2 = 6 k\u2126||3 k\u2126 at position 1 = 2 k\u2126
R2 = 120 k\u2126
funity = 1 MHz
Solution:
Av1(CL) = (R2/R1) + 1 (Eq. 18-12)
Av1(CL) = (120 k\u2126/2 k\u2126)+ 1
Av1(CL) = 61
Av2(CL) = (R2/R1) + 1 (Eq. 18-12)
Av2(CL) = (120 k\u2126/6 k\u2126) + 1
Av2(CL) = 21
f2(CL)1 = funity/Av(CL1) (Eq. 18-5)
f2(CL)1 = 1 MHz/61
f2(CL)1 = 16.4 kHz
f2(CL)2 = funity/Av(CL1)(max) (Eq. 18-5)
f2(CL)2 = 1 MHz/21
f2(CL)2 = 47.6 kHz
Answer: The voltage gain at position 1 is 61, with a
bandwidth of 16.4 kHz, and at position 2 is 21, with a
bandwidth of 47.6 kHz.
18-23. Given:
R1 = \u221e at position 2
R1 = 3 k\u2126 at position 1
R2 = 120 k\u2126
funity = 1 MHz
AVOL = 100,000
Solution:
AV1(CL) = (R2/R1) + 1 (Eq. 18-12)
AV1(CL) = (120 k\u2126/3 k\u2126) + 1
Av1(CL) = 41
At position 2, it becomes a voltage follower: AvCL2 = 1.
Answer: The voltage gain at position 1 is 41, and at
position 2 is 1.
1-92
18-24. Answer: The output will go to positive or negative
saturation.
Position 1: The input voltage is applied directly to the
noninverting input. Because of the virtual short between
the noninverting and inverting input terminals, there is
no ac voltage across the left 10-k\u2126 resistor. Since there
is no ac voltage across the resistor, it can be removed
from the circuit without changing the operation. With
the resistor removed, the circuit reduces to a voltage
follower and Av(CL) = 1 and a closed-loop bandwidth of
unity2( )
( )
1 MHz 1 MHz
1CL v CL
f
f
A
= = =
Position 2: The circuit is an inverting amplifier. The
magnitude of the voltage gain is Av(CL) = 1. Note that the
closed-loop bandwidth is only half as much because
unity2( )
( )
1 MHz 500 kHz
1 1 1CL V CL
f
f
A
= = =+ +
This was covered briefly in the chapter. See the equation
at the top of p. 633 and the brief explanation that
follows. Chapter 19 discusses the closed-loop
bandwidths in more detail.
Position 1: With the left resistor open, the circuit
reduces to a voltage follower and AV(CL) = 1.
Position 2: With the left resistor open, the voltage gain
is zero.
18-27. Answer: Go to positive or negative saturation.
18-28. Given:
Iin(biaS) = 500 nA
Iin(off) = 200 nA
Vin(off) = 6 mV
R1 = 2 k\u2126
R2 = 100 k\u2126
C = 1 \u3bcF
Solution:
XC = 1/2\u3c0fC
XC = 1/[2\u3c0(0)(1 \u3bcF)]
XC = \u221e
1 1CR X R\u2032 = +
1R
\u2032 = \u221e + 2 k\u2126
1R
\u2032 = \u221e
RB2 = R1||R2 (Eq. 18-11)
RB2 = \u221e||100 k\u2126
RB2 = 100 k\u2126
V1err = (RB1 \u2013 RB2)Iin(biaS) (Eq. 18-8)
V1err = (0 \u2013 100 k\u2126)(500 nA)
V1err = 50 mV
V2err = (RB1 + RB2)(Iin(off)/2) (Eq. 18-8)
V2err = (0 + 100 k\u2126)(200 nA/2)
V2err = 10 mV
V3err = Vin(off) = 6 mV
AV(CL) = (R2/ 1R\u2032 ) + 1 (Eq. 18-12)
AV(CL) = (100 k\u2126/\u221e) + 1
AV(CL) = 1
Verror = ± ACL( ± V1err ± V2err ± V3err)
Verror = 1(50 mV + 10 mV + 6 mV)
Verror = 66 mV
Answer: The output voltage is 66 mV.
18-29. Given:
R1 = 2 k\u2126
R2 = 100 k\u2126
C = 1 \u3bcF
vin = 50 mV pp
f = 1 kHz
Solution:
XC = 1/2\u3c0fC
XC = 1/[2\u3c0(1 kHz)(1 \u3bcF)]
XC = 159 \u2126
Since XC is less than one-tenth of 2 k\u2126, the bottom of
the 2 k\u2126 is approximately an ac ground.
AV(CL) = (R2/ 1R
\u2032 ) + 1 (Eq. 18-12)
AV(CL) = (100 k\u2126/2 k\u2126) + 1
AV(CL) = 51
vout = AV(CL)vin
vout = 51(50 mV pp)
vout = 2.55 V pp
Answer: The output voltage is 2.55 V.
18-30. Given:
Iin(biaS) = 500 nA
Iin(off) = 200 nA
Vin(off) = 6 mV
R1 = 2 k\u2126
R2 = 100 k\u2126
Solution:
1R\u2032 = XC = R1
1R\u2032 = 0 + 2 k\u2126
1R\u2032 = 2 k\u2126
RB2 = R1||R2 (Eq. 18-11)
RB2 = 2 k\u2126||100 k\u2126
RB2 = 1.96 k\u2126
V1err = (RB1 \u2013 RB2)Iin(biaS) (Eq. 18-8)
V1err = (0 \u2013 1.96 k\u2126)(500 nA)
V1err = 980 \u3bcV
V2err = (RB1 + RB2)(Iin(off)/2) (Eq. 18-8)
V2err = (0 + 1.96 k\u2126)(200 nA/2)
V2err = 196 \u3bcV
V3err = Vin(off) = 6 mV
AV(CL) = 2 1( / )R R\u2032 + 1 (Eq. 18-12)
AV(CL) = (100 k\u2126/2 k\u2126) + 1
AV(CL) = 51
Verror = ± AV(CL)( ± V1err ± V2err ± V3err)
Verror = 51(980 \u3bcV + 196 \u3bcV + 6 mV)
Verror = 366 mV
Answer: The output voltage is 366 mV.
For IB1:
V1\u2014increase. Because of the increase in voltage drop
across the resistor.
V2\u2014no change. Not affected.
Vin\u2014increase. Because of the increase in V1.
Vout\u2014increase. Because of the increase in input voltage.
MPP\u2014no change. Since the load resistance and VCC did
not change.
fmax\u2014no change. Since slew rate did not change.
For IB2:
V1\u2014no change. Not affected.
V2\u2014increase. Because of the increase in voltage drop
across the resistor.
1-93
Vin\u2014increase. Because of the increase in V2.
Vout\u2014increase. Because of the increase in input voltage.
MPP\u2014no change. Since the load resistance and VCC did
not change.
fmax\u2014no change. Since slew rate did not change.
18-32. Given:
For VCC:
V1\u2014no change. Not affected.
V2\u2014no change. Not affected.
Vin\u2014no change. Not affected.
Vout\u2014no change. Not affected.
MPP\u2014increase Since VCC is increased.
fmax\u2014no change. Since slew rate did not change.
18-33. Given:
V1\u2014no change. Not affected.
V2\u2014no change. Not affected.
Vin\u2014no change. Not affected.
Vout\u2014no change. Not affected.
MPP\u2014no change. Since the load resistance and VCC did
not change.
fmax\u2014increase. Since slew rate increased.
18-34. Given:
V1\u2014no change. Not affected.
V2\u2014no change. Not affected.
Vin\u2014no change. Not affected.
Vout\u2014no change. Not affected.
MPP\u2014no change. Since the load resistance and VCC did
not change.
fmax\u2014decrease. Since the increase in voltage causes the
rate of voltage rise to increase.
Chapter 19 Negative Feedback
SELF-TEST
1. b 8. b 15. b 22. d
2. d 9. b 16. d 23. d
3. a 10. b 17. c 24. b
4. a 11. d 18. b 25. a
5. a 12. b 19. c 26. b
6. c 13. b 20. b 27. d
7. b 14. b 21. c 28. a
JOB INTERVIEW QUESTIONS
8. Increased voltage gain and possible oscillation.
12. Current amplifier and transconductance amplifier.
PROBLEMS
19-1. Given:
R1 = 2.7 k\u2126
Rf = 68 k\u2126
AVOL(dB) = 88 dB
Solution:
B = R1/(R1 + Rf) (Eq. 19-6)
B = 2.7 k\u2126/(2.7 k\u2126 + 68 k\u2126)
B = 0.038
AV = 1/B (Eq. 19-4)
AV = 1/0.038
AV = 26.32
Av = antilog(Av(dB)/20) (Eq. 16-15)
Av = antilog(88 dB/20)
Av = 25,119
%error = 100%(1 + AVOLB) (Eq 19-5)
%error = 100%[1 + 25,119(0.038)]
%error = 0.10%
AV = AVOL/(1 + AVOLB) (Eq. 19-3)
AV = 25,119/[l + 25,119(0.038)]
AV = 26.29
Answer: The feedback fraction is 0.038, the ideal
closed-loop voltage gain is 26.32, the percent error is
0.10%, and the exact voltage gain is 26.29.
19-2. Given:
R1 = 2.7 k\u2126
Rf = 39 k\u2126
AVOL(dB) = 88 dB
Solution:```
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