Digital Design_ Principles and Practices, Chegg Solution Manual_parte_400

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Step 1 of 1 8.08DP The GAL16V8, GAL20V8 and GAL22V10 has programmable output polarity nothing but polarity change at the output side instead of input and let us assume that the PLDs GAL16V8, GAL20V8 and GAL22V10 are programming for the 4-bit register as like as 74x175 Now write the ABEL program for 74x175 a 4-bit register: module Z74X175 title " "Input pins CLR_L, CLK pin 1, 9; D1, D2, D3 pin; " Output pins Q0, Q1, Q2, Q3 pin 2, 7, 10, 15 istype 'reg.buffer'; /Q0, /Q1, /Q2, /Q3 pin 3, 6, 11, 14 istype 'reg.buffer'; " Set definitions D = [D0, D1, D2, D3]; Q = [Q0, Q1, Q2, Q3]; /Q = [/Q0, /Q1, /Q2, /Q3]; CLR =!CLR_L; "Active-level conversions equations if CLK then Q=D; /Q=ID; end Z74X175