Chegg Solutions for Microelectronic Circuits (Adel S Sedra, Kenneth C Smith) (Z-Library)_parte_1665

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Step of 8 15.008P Consider Iₛ IS the small amount of current that flows in sub threshold condition. Consider iD the small amount of drain current that flows for (1) Consider kT is the thermal voltage, is a constant, and is the saturation current. q Write the equation for Iₛ Consider Iₛ is proportional to (2) Step of 8 Consider the threshold voltage of the NMOS transistor is reduced by 0.1 Determine Iₛ after reducing by 0.1. Replace 0.025 for and 2 for n in equation 2. 0.1 = (0.1) 2(0.025) = A The current is increased by 39 times. Step of 8 Determine the drain current in Replace 0 for in equation 1. The drain current is also increased 7.39 times. Step of 8 Determine the static power dissipation. Therefore, the static power dissipation is also increased by 7.39 times. Step of 8 Consider the threshold voltage of the NMOS transistor is reduced by 0.2 V Determine after reducing V, by 0.2. Replace 0.025 for and 2 for n in equation 2. = The current is increased by 54.5 times. Step of 8 Determine the drain current Replace 0 for GS in equation 1. The drain current is also increased 5 times. Step of 8 Determine the static power Therefore, the static power dissipation is also increased by 54. 5 times. Step of 8 Consider if the threshold voltage is reduced by 0.1 V then the amount of power dissipated by the inverter is increase by 7.39 times. If the threshold voltage is reduced by 0.2 V then the amount of power dissipated by inverter is increased by 54 times Therefore, to reduce the static power dissipation, the current that flows for = 0 must be reduced. Therefore, the current that flows for =0 can be reduced by selecting high threshold voltage.