LogixProCCZF

emphasis.
The following table summarizes the conventions used to distinguish the differences
between the SLC 5/03, SLC 5/04, and SLC 5/05 keyswitch positions, the processor
modes, and the actual display on the programmer status line.
When Referring to the
Keyswitch Position
When Referring to the
Processor Mode
When Referring to the
Status Line
RUN position Run mode RUN
Run mode REM RUN
Program mode REM PROG
REMote position Test – Single Step mode REM SRG
Test – Single Scan mode REM SSN
Test – Continuous Scan mode REM CSN
PROGram position Program mode PROG
Basic Instructions
1–1
1 Basic Instructions
This chapter contains general information about the basic instructions and explains
how they function in your application program. Each of the basic instructions
includes information on:
• what the instruction symbol looks like
• how to use the instruction
In addition, the last section contains an application example for a paper drilling
machine that shows the basic instructions in use.
Bit Instructions
Instruction
Purpo e Pa e
Mnemonic Name
Purpose Page
XIC Examine if Closed Examines a bit for an On condition. 1–9
XIO Examine if Open Examines a bit for an Off condition. 1–9
OTE Output Energize Turns a bit On or Off. 1–10
OTL and
OTU
Output Latch and
Output Unlatch
OTL turns a bit on when the rung is executed, and
this bit retains its state when the rung is not execut-
ed or a power cycle occurs. OTU turns a bit off
when the rung is executed, and this bit retains its
state when the rung is not executed or when power
cycle occurs.
1–10
OSR One-Shot Rising Triggers a one-time event. 1–11
continued on next page
PrefaceInstruction Set Reference Manual
1–2
Timer/Counter Instructions
Instruction
Purpo e Pa e
Mnemonic Name
Purpose Page
TON Timer On-Delay Counts timebase intervals when the instruction is
true.
1–17
TOF Timer Off-Delay Counts timebase intervals when the instruction is
false.
1–18
RTO Retentive Timer Counts timebase intervals when the instruction is
true and retains the accumulated value when the
instruction goes false or when power cycle occurs.
1–19
CTU Count Up Increments the accumulated value at each false–to–
true transition and retains the accumulated value
when the instruction goes false or when power cycle
occurs.
1–24
CTD Count Down Decrements the accumulated value at each false–
to–true transition and retains the accumulated value
when the instruction goes false or when power cycle
occurs.
1–25
HSC High-Speed
Counter
Counts high-speed pulses from a fixed controller
high-speed input.
1–26
RES Reset Resets the accumulated value and status bits of a
timer or counter. Do not use with TOF timers.
1–31
About the Basic Instructions
These instructions, when used in ladder programs, represent hardwired logic circuits
used for the control of a machine or equipment.
The basic instructions are separated into three groups: bit, timer, and counter.
Before you learn about the instructions in each of these groups, we suggest that you
read the overview that precedes the group:
• Bit Instructions Overview
• Timer Instructions Overview
• Counter Instructions Overview
Basic Instructions
1–3
Bit Instructions Overview
These instructions operate on a single bit of data. During operation, the processor
may set or reset the bit, based on logical continuity of ladder rungs. You can
address a bit as many times as your program requires.
Note Using the same address with multiple output instructions is not recommended.
Bit instructions are used with the following data files:
Output and Input Data Files (Files O0: and I1:)
These represent external outputs and inputs. Bits in file 1 are used to represent
external inputs. In most cases, a single 16-bit word in these files will correspond to
a slot location in your controller, with bit numbers corresponding to input or output
terminal numbers. Unused bits of the word are not available for use.
The table below explains the addressing format for outputs and inputs. Note that the
format specifies e as the slot number and s as the word number. When you are
dealing with file instructions, refer to the element as e.s (slot and word), taken
together.
Format Explanation
O Output
I Input
: Element delimiter
O:e.s/b e Slot number(decimal)
Slot 0, adjacent to the power supply in the first chassis, applies
to the processor module (CPU). Succeeding slots are I/O
slots, numbered from 1 to a maximum of 30.
I:e.s/b . Word delimiter. Required only if a word number is necessary as noted below.
s Wordnumber
Required if the number of inputs or outputs exceeds 16 for the
slot. Range: 0–255 (range accommodates multi-word
“specialty cards”)
/ Bit delimiter
b Terminalnumber
Inputs: 0–15 
Outputs: 0–15
PrefaceInstruction Set Reference Manual
1–4
Examples (applicable to the controller shown on page F–12):
O:3/15 Output 15, slot 3
O:5/0 Output 0, slot 5
O:10/11 Output 11, slot 10
I:7/8 Input 8, slot 7
I:2.1/3 Input 3, slot 2, word 1
Word addresses:
O:5 Output word 0, slot 5
O:5.1 Output word 1, slot 5
I:8 Input word 0, slot 8
Default Values: Your programming device will display an address more formally. For example,
when you assign the address O:5/0, the programming device will show it as O:5.0/0 (Output file,
slot 5, word 0, terminal 0).
Status File (File S2:)
You cannot add to or delete from the status file. The MicroLogix 1000 controller
status file is explained in appendix A and the SLC 500 processor status file is
explained in appendix B. You can address various bits and words as follows:
Format Explanation
S Status file
: Element delimiter
S:e/b e Element
number
Ranges from 0–15 in a fixed or SLC 5/01 controller,
0–32 in an SLC 5/02, 
0–83 in an SLC 5/03 OS300, 
0–96 in an SLC 5/03 OS301 and later and 5/04 OS400, and 
0–64 in an SLC 5/04 OS401 and SLC 5/05 processors.
These are 1-word elements. 16 bits per element.
/ Bit delimiter
b Bit number Bit location within the element. Ranges from 0–15.
Examples:
S:1/15 Element 1, bit 15. This is the “first pass” bit, which you can use to initialize instructions 
in your program.
S:3 Element 3. The lower byte of this element is the current scan time. The upper byte is 
the watchdog scan time.
Basic Instructions
1–5
Bit Data File (B3:)
File 3 is the bit file, used primarily for bit (relay logic) instructions, shift registers,
and sequencers. The maximum size of the file is 256 1-word elements, a total of
4096 bits. You can address bits by specifying the element number (0 to 255) and the
bit number (0 to 15) within the element. You can also address bits by numbering
them in sequence, 0 to 4095.
You can also address elements of this file.
Format Explanation Examples
B Bit type file
Bf:e/b f
File number. Number 3 is the default file. A file
number between 9–255 can be used if additional
storage is required.
B3:3/14
Bit 14, element 3
: Element delimiter
e Elementnumber
Ranges from 0–255. These are
1-word elements. 16 bits per
element.
B3:252/00
Bit 0, element 252
/ Bit delimiter
b Bit number Bit location within the element.Ranges from 0–15.
B3:9
Bits 0–15, element 9
Format Explanation Examples
Bf/b
B
f
/
Same as above.
Same as above.
Same as above.
B3/62
Bit 62
b Bit number Numerical position of the bit withinthe file. Ranges from 0–4095.
B3/4032
Bit 4032
Timer and Counter Data Files (T4: and C5:)
See pages 1–15 and 1–22 respectively for the addressing