A maior rede de estudos do Brasil

Grátis
LogixProCCZF

Pré-visualização | Página 37 de 50

| increments | |
| | +MOV–––––––––––––––– | |
| +–+MOVE +–+ |
| |Source N7:20| |
| | 0| |
| |Dest N7:10| |
| | 0| |
| +––––––––––––––––––+ |
|–––––––––––––––––––––––––––––––––––––+END+––––––––––––––––––––––––––––––––––––|
Data Handling Instructions
4–1
4 Data Handling Instructions
This chapter contains general information about the data handling instructions and
explains how they function in your application program. Each of the instructions
includes information on:
• what the instruction symbol looks like
• how to use the instruction
In addition, the last section contains an application example for a paper drilling
machine that shows the data handling instructions in use.
Data Handling Instructions
Instruction
Purpo e Pa e
Mnemonic Name
Purpose Page
TOD Convert to BCD Converts the integer source value to BCD format
and stores it in the destination.
4–3
FRD Convert from BCD Converts the BCD source value to an integer and
stores it in the destination.
4–6
DEG Convert from
Radians to
Degrees
Converts radians (source) to degrees and stores the
result in the destination.
4–10
RAD Convert from
Degrees to
Radians
Converts degrees (source) to radians and stores the
result in the destination.
4–11
DCD Decode 4 to 1 of
16
Decodes a 4-bit value (0 to 15), turning on the
corresponding bit in the 16-bit destination.
4–12
ENC Encode 1 of 16 to 4 Encodes a 16-bit source to a 4-bit value. Searches
the source from the lowest to the highest bit, and
looks for the first set bit. The corresponding bit
position is written to the destination as an integer.
4–13
COP and
FLL
Copy File and
Fill File
The COP instruction copies data from the source file
to the destination file The FLL instruction loads a
source value into each position in the destination
file.
4–14
continued on next page
PrefaceInstruction Set Reference Manual
4–2
Instruction
Purpo e Pa e
Mnemonic Name
Purpose Page
MOV Move Moves the source value to the destination. 4–19
MVM Masked Move Moves data from a source location to a selected
portion of the destination.
4–20
AND And Performs a bitwise AND operation. 4–22
OR Or Performs a bitwise inclusive OR operation. 4–23
XOR Exclusive Or Performs a bitwise exclusive OR operation. 4–24
NOT Not Performs a NOT operation. 4–25
NEG Negate Changes the sign of the source and stores it in the
destination.
4–26
FFL and
FFU
FIFO Load and
FIFO Unload
The FFL instruction loads a word into a FIFO stack
on successive false-to-true transitions. The FFU
unloads a word from the stack on successive false-
to-true transitions. The first word loaded is the first
to be unloaded.
4–29
LFL and
LFU
LIFO Load and
LIFO Unload
The LFL instruction loads a word into a LIFO stack
on successive false-to-true transitions. The LFU
unloads a word from the stack on successive false-
to-true transitions. The last word loaded is the first
to be unloaded.
4–30
About the Data Handling Instructions
Use these instructions to convert information, manipulate data in the controller, and
perform logic operations.
In this chapter you will find a general overview preceding groups of instructions.
Before you learn about the instructions in each of these groups, we suggest that you
read the overview. This chapter contains the following overviews:
• Move and Logical Instructions Overview
• FIFO and LIFO Instructions Overview
Data Handling Instructions
4–3
Convert to BCD (TOD)
Use this instruction to convert 16-bit integers into BCD values.
With Fixed and SLC 5/01 processors, the destination can only be the math register.
With SLC 5/02 and higher processors and MicroLogix 1000 controllers, the
destination parameter can be a word address in any data file, or it can be the math
register, S:13 and S:14.
If the integer value you enter is negative, the absolute value of the number is used
for conversion.
Updates to Arithmetic Status Bits
With this Bit: The Processor:
Carry (C) always resets.
Overflow (V) sets if the BCD result is larger than 9999. Overflow results in a minor
error.
Zero (Z) sets if destination value is zero.
Sign (S) sets if the source word is negative; otherwise resets.
Changes to the Math Register, S:13 and S:14
Contains the 5–digit BCD result of the conversion. This result is valid at overflow.
3333 333
TOD
TO BCD
Source
Dest
TOD
TO BCD
Source
Dest S:13
00000000
Output Instruction
SLC 5/02 and higher processors
and MicroLogix 1000 controllers
Output Instruction
Fixed and SLC 5/01
Processors
PrefaceInstruction Set Reference Manual
4–4
Example 1
The integer value 9760 stored at N7:3 is converted to BCD and the BCD equivalent
is stored in N10:0. The maximum BCD value possible is 9999.
TOD
TO BCD
Source N7:3
9760
Dest N10:0
9760
The destination value is displayed in
BCD format.
9 7 6 0
9 7 6 0
N7:3 Decimal 0010 0110 0010 0000
N10:0 4–digit BCD 1001 0111 0110 0000
Example 2
The integer value 32760 stored at N7:3 is converted to BCD. The 5-digit BCD
value is stored in the math register. The lower 4 digits of the BCD value is moved
to output word O:2 and the remaining digit is moved through a mask to output word
O:3.
When using the math register as the destination parameter in the TOD instruction,
the maximum BCD value possible is 32767. However, for BCD values above 9999,
the overflow bit is set, resulting in minor error bit S:5/0 also being set. Your ladder
program can unlatch S:5/0 before the end of the scan to avoid major error 0020, as
done in this example.
3 333
3 333
Data Handling Instructions
4–5
TOD
TO BCD
Source N7:3
32760
Dest S:13
00032760
(U)
 S:5
0
] [
S:0
 1
S:13 and S:14 are
displayed in BCD
format.
MOV
MOVE
Source S:13
10080
Dest O:2.0
10080
MVM
MASKED MOVE
Source S:14
3
Mask 000F
Dest O:3.0
3
] [
0 0 0 3 2 7 6 0
3 2 7 6 0
0 01515
N7:3 Decimal
S:13 & S:14 5–digit BCD
S:14 S:13
This example will output the absolute value (0–32767)
contained in N7:3 as 5 BCD digits in output slots 2 and 3.
Minor Error Bit
0010 0111 0110 0000
0000 0000 0000 0011
Overflow Bit
PrefaceInstruction Set Reference Manual
4–6
Convert from BCD (FRD)
Use this instruction to convert BCD values to integer values. With Fixed and
SLC 5/01 processors, the source can only be the math register. With SLC 5/02 and
higher processors and MicroLogix 1000 controllers, the source parameter can be a
word address in any data file, or it can be the math register, S:13.
Updates to Arithmetic Status Bits
With this Bit: The Processor:
Carry (C) always resets.
Overflow (V)
sets if non–BCD value is contained at the source or the value to be
converted is greater than 32,767; otherwise reset. Overflow results in a
minor error.
Zero (Z) sets if destination value is zero.
Sign (S) always resets.
Note We recommend that you always provide ladder logic filtering of all BCD input
devices prior to performing the FRD instruction. The