Counters Different FlipFlops

Prévia do material em texto

VII - Finite State Machines © Copyright 2004, Gaetano Borriello and Randy H. Katz 1 
Activity 
 Implement the State Transition Diagram 
 
 
using the following flip-flops: 
 
 T 
 R-S 
 J-K 
 
Count sequence: 000, 010, 011, 101, 110 010 
000 110 
101 
011 
Counter Design Procedure 
More Complex Count Sequence 
Step 1: Derive the State Transition Diagram 
Count sequence: 000, 010, 011, 101, 110 
Step 2: State Transition Table 
Present 
State 
Next 
State 
010 
000 110 
101 
011 
Counter Design Procedure 
More Complex Count Sequence 
Step 1: Derive the State Transition Diagram 
Count sequence: 000, 010, 011, 101, 110 
Step 2: State Transition Table 
Note the Don't Care conditions 
Present 
State 
Next 
State 
010 
000 110 
101 
011 
Counter Design Procedure 
More Complex Counter Sequencing 
Choose Flipflop Type for Implementation 
 Use Excitation Table to Remap Next State Functions 
Toggle Excitation 
Table 
Remapped Next State 
Functions 
Present 
State 
Toggle 
Inputs Next 
State 
Counter Design Procedure 
More Complex Counter Sequencing 
Step 4: Choose Flipflop Type for Implementation 
 Use Excitation Table to Remap Next State Functions 
Toggle Excitation 
Table 
Remapped Next State 
Functions 
Present 
State 
Toggle 
Inputs Next 
State 
Counter Design Procedure 
More Complex CounterSequencing 
Remapped K-Maps 
TC = A C + A C = A xor C 
 
TB = A + B + C 
 
TA = A B C + B C 
TC 
TA 
TB 
Counter Design Procedure 
More Complex Counter Sequencing 
Resulting Logic: 
Timing Waveform: 
5 Gates 
13 Input Literals + 
 Flipflop connections 
TC T 
CLK 
Q 
Q 
S 
R 
Count 
T 
CLK 
Q 
Q 
S 
R 
TB C 
\C 
B A 
\B \A 
TA T 
CLK 
Q 
Q 
S 
R 
\Reset 
TC 
TB 
TA 
A 
A 
C 
C 
\B 
\A 
B 
\C 
\B 
C 
Implementation with Different Kinds of FFs 
R-S Flipflops 
Continuing with the 000, 010, 011, 101, 110, 000, ... counter example 
RS Exitation Table 
Remapped Next State Functions 
Present 
State 
Next 
State Remapped Next State 
Q+ = S + R Q Q+ = S + R Q 
Implementation with Different Kinds of FFs 
R-S Flipflops 
Continuing with the 000, 010, 011, 101, 110, 000, ... counter example 
RS Exitation Table 
Remapped Next State Functions 
Present 
State 
Next 
State Remapped Next State 
Q+ = S + R Q Q+ = S + R Q 
Implementation with Different Kinds of FFs 
RS FFs Continued 
RC = 
 
SC = 
 
RB = 
 
SB = 
 
RA = 
 
SA = 
CB 
00 01 11 10 A 
0 
1 
RC 
CB 
00 01 11 10 A 
0 
1 
RA 
CB 
00 01 11 10 A 
0 
1 
RB 
CB 
00 01 11 10 A 
0 
1 
SC 
CB 
00 01 11 10 A 
0 
1 
SA 
CB 
00 01 11 10 A 
0 
1 
SB 
Implementation with Different Kinds of FFs 
RS FFs Continued 
RC = A 
 
SC = A 
 
RB = A B + B C 
 
SB = B 
 
RA = C 
 
SA = B C 
RC 
RA 
RB 
SC 
SA 
SB 
Implementation With Different Kinds of FFs 
RS FFs Continued 
Resulting Logic Level Implementation: 
 3 Gates, 11 Input Literals + Flipflop connections 
CLK CLK CLK 
\ A R 
S A 
C 
\ C 
Q 
Q 
RB 
\ B 
R 
S 
Q 
Q 
\ B 
B C 
SA 
R 
S 
A 
\A 
B 
A 
C B \C 
RB SA 
Q 
Q 
Count 
Implementation with Different FF Types 
J-K FFs 
J-K Excitation Table 
Remapped Next State Functions 
Present 
State 
Next 
State Remapped Next State 
Q+ = J Q + K Q 
Implementation with Different FF Types 
J-K FFs 
J-K Excitation Table 
Remapped Next State Functions 
Present 
State 
Next 
State Remapped Next State 
Q+ = J Q + K Q 
Implementation with Different FF Types 
J-K FFs Continued 
JC = 
 
KC = 
 
JB = 
 
KB = 
 
JA = 
 
KA = 
CB 
00 01 11 10 A 
0 
1 
JC 
CB 
00 01 11 10 A 
0 
1 
JA 
CB 
00 01 11 10 A 
0 
1 
JB 
CB 
00 01 11 10 A 
0 
1 
KC 
CB 
00 01 11 10 A 
0 
1 
KA 
CB 
00 01 11 10 A 
0 
1 
KB 
Implementation with Different FF Types 
J-K FFs Continued 
JC = A 
 
KC = A 
 
JB = 1 
 
KB = A + C 
 
JA = B C 
 
KA = C 
JC 
JA 
JB 
KC 
KA 
KB 
JC 
JA 
JB 
KC 
KA 
KB 
Implementation with Different FF Types 
J-K FFs Continued 
Resulting Logic Level Implementation: 
 2 Gates, 10 Input Literals + Flipflop Connections 
CLK CLK CLK 
J 
K 
Q 
Q 
A 
\ A 
C 
\ C KB 
J 
K 
Q 
Q 
B 
\ B 
+ 
J 
K 
Q 
Q 
JA 
C 
A 
\ A 
B 
\ C 
Count 
A 
C KB JA 
Implementation with Different FF Types 
D FFs 
Simplest Design Procedure: No remapping needed! 
DC = A 
 
DB = A C + B 
 
DA = B C 
Resulting Logic Level Implementation: 
 3 Gates, 8 Input Literals + Flipflop connections 
CLK CLK 
D Q 
Q 
A 
\ A 
D Q 
Q 
DA DB B 
\ B CLK 
D Q 
Q 
A C 
\ C 
Count 
\ C 
\ A 
\ B 
B 
\ C DA DB 
	Activity
	Counter Design Procedure
	Counter Design Procedure
	Counter Design Procedure
	Counter Design Procedure
	Counter Design Procedure
	Counter Design Procedure
	Implementation with Different Kinds of FFs
	Implementation with Different Kinds of FFs
	Implementation with Different Kinds of FFs
	Implementation with Different Kinds of FFs
	Implementation With Different Kinds of FFs
	Implementation with Different FF Types
	Implementation with Different FF Types
	Implementation with Different FF Types
	Implementation with Different FF Types
	Implementation with Different FF Types
	Implementation with Different FF Types