CS310-CH19 - APPA - CombinationalCircuits

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Combinational Circuits
Western Illinois University
Department of Computer Science
 Prof. Paulo Martins
Created by W. Stallings Modified by P. Martins
Computer Organization 
& Architecture 
6th Edition
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Defining a Combinational Circuit
Graphic symbols
Truth Table
Boolean Equations
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Representation of Combinatorial Circuits
Equation  Truth Table  Circuit
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Basic Identities of Boolean Algebra
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A Boolean Function of three Variables
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Sum of Products (SOP)
F = ABC + ABC + ABC
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SOP Implementation
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Karnaugh Maps
Is used for simplification
Used for representing a Boolean function as a function of a small number of variables (up to six)
It is an array of 2eN squares (N = number of input variables)
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K Maps (represent boolean functions)
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Rules for simplification
Build Karnaugh Map
Among the marked squares (squares with 1), find those that belong to a unique largest block of either 1,2,4 or 8 and circle those blocks
Select additional blocks of marked squares that are as large as possible and as few in number as possible.
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Rules for simplification
Continue to draw loops around single marked squares, or pairs of adjacent marked squares, or groups of four, eight and so on, in such a way that every marked square belongs to at least one loop.
If any isolated 1s remain after the groupings, then each of these is circled as a group of 1s.
Any group of 1s that is completely overlapped by other groups can be eliminated
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Use of Karnaugh Maps
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K-Map: ABD
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K – Map: AB 
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K-Map: A
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K-Map: D
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K-Map: C
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K-Map: BD
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K-Map: ABD
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K-Map: BCD
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K-Map: BC
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Simplify Equation (A1)
 
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Karnaugh Map – three variables
00 01 11 10
0
1
A
BC
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Truth Table (used to build Map)
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K – Map 
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K – Map 
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Simplified Equation
F = AB + BC
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Simplified Circuit
Draw simplified circuit from previous slide
Compare with circuit in slide 8
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Multiplexers
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Application
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Mux Input to Program Counter
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4-to-1 Multiplexer Truth Table
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Multiplexer Implementation
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Decoders – Definition
DECODER
(only one output line is
 “activated” at any 
Time)
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Decoder Implementation
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Application: Decoding Address Space
Used to select RAM IC
Used to select memory space inside RAM IC 
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Address Decoding
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Demultiplexer
DEMUX
2-4
Data line
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Demultiplexer Implementation
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Demultiplexer
Data input
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Programmable Logic Array
For each particular logic function, the layout of gates have to be designed.
That involves cost and time
A general-purpose chip can be readily adapted for specific purposes
Welcome the “Programmable Logic Array!”
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PLA - Premises
Any Boolean Function can be expressed in a sum-of-products (SOP) form
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PLA - Implementation
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Exercise
Implement the functions: 
F = ABC + AB and
F = AB + AC 
using the previous PLA
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PLA - Implementation
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Read Only Memory
Combination circuits are “memoryless”
ROMs are, however, implemented with combinational circuits
ROMs function – Given a set of input lines (addresses), always produces the same output (data lines).
Outputs are a function ONLY of the present inputs
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Truth table for ROM
X4 X3 X2 X1
Z1 Z2 Z3 Z4
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64-Bit ROM
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
Note that Z1 is connected to the last 8 outputs
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Binary Addition Equations
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Binary Addition Truth Tables
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Binary Addition Truth Tables
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4 bit adder
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Implementation of an Adder
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A 32-Bit Adder
8-bit
adder
8-bit
adder
8-bit
adder
8-bit
adder
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References
Appendix A - Computer Organization and Architecture - Designing for Performance - William Stallings, 6th Edition.
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Mux – why mux?
Buses take space
Too many devices to be connected by the bus
Bus has to be shared between devices
Mux provide a way of sharing lines
Intra IC – address and data lines are multiplexed as well because ic have a limited number of pins
Multiplexer used to be a woman