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CURRENT MODE BUCK BOOST DESIGN DATA and TL494 - SEPIC Converter Design Procedure We are going to use the TL494 to design a SEPIC converter that converts and input voltage of 12V-24V to an output voltage of 5V-30V supplying a load of 5A 150W with a switching frequency of 100kHz. The outline schematic is shown in FIG. 1 V12Vin_min V0.5VD V24Vin_max V4Vout_min V30Vout_max A5Iout_max %95η Assuming 95% efficiency we know the output power is: I out_max V out_max P out_max W150Pout_max η P out_max P in_max A13.1579V in_min P in_max I in_max W157.8947Pin_max I out_max V out_max R load_min Ω6Rload_min The duty cycle of the converter when operating in continuous conduction mode is given by V in_max V D V out_min V D V out_min D min 0.1579Dmin V in_min V D V out_max V D V out_max D max 0.7176Dmax Operation Frequency Single-ended applications: kΩ10RT nF1CT kHz100 C T R T 1 f sw ns7176.4706 f sw D max T on this equates to a FET ON time of ns10000 f sw 1 At this point it is worth checking that we are not violating the minimum ON time of the controller ns7176.4706TonFET ON time IRFZ44N (60ns) < Controller ON time (150ns) << Inductor Choice To design the SEPIC regulator we need to define the maximum allowed ripple in the inductors. A good rule of thumb is to use 20% to 40% of the input current. Assuming the allowed ripple through both inductors is 40% we arrive at the following expression: I in_max%40ΔIL A5.2632ΔIL 17 Apr 2023 04:37:43 - Mosfet TL494 - 2N22222,2N2907.sm 1 / 5 Average input current: Individual inductors f sw D max ΔI L V in_min L 1 μH16.3624L1L2 If inductors L1 and L2 are coupled inductors, the value of the inductance required is half of what would be needed should there be two separate inductors. Therefore, for coupled inductors the value of inductance required is given by: f sw D max ΔI L2 V in_min L 1couple μH8.1812L1coupleL2couple Since we have calculated a desired (individual) inductance of 20uH, if we use a coupled inductor we need the inductance of each coil to be 10uH. A coupled inductor often works out smaller in size than 2 separate inductors. Also, note the winding phase of the transformer. A useful way to remember the phasing of the SEPIC is to consider removing the coupling cap - the SEPIC then becomes a flyback converter and indeed the circuit operation of a coupled inductor based SEPIC and a flyback are very similar. Maximum inductor peak current is for minimum input voltage: f sw D max L 12 V in_min ηV in_min P out_max I L1_peak 2 ΔI L I in_max I L1_peak or A15.7895IL1_peak Must make sure that the inductor never saturates. 2 ΔI L I out_max I L2_peak A7.6316IL2_peak MOSFET ChoiceMOSFET Choice A23.4211IL2_peakIL1_peak V54.4V0.4Vout_maxVin_max The MOSFET needs to be able to handle the peak current from both inductors so in this design a drain source current rating (Id) of is more than sufficient. The Drain–Source voltage rating (Vds) needs to be in excess of the (Vin + Vout + Vdiode) . The Gate-Source turn on voltage of the MOSFET (Vgs) needs to be less than the input voltage, to ensure that the Gate drive voltage can actually activate the MOSFET. Logic level MOSFETs have a low turn on voltage, are widely available and usually perfect for low voltage dc/dc converters. I L2_peak I L1_peak I FET_peak A23.4211IFET_peak D max I in_max I FET_rms A15.5321IFET_rms Diode Selection To ensure proper operation and avoid damaging the diode,the diode selected must be able to withstand reverse voltages equal to: V out_max V in_max V R V54VR A23.4211IFET_peakThe peak current through the diode is equal to the peak current of transistor . Coupling Capacitor Selection The coupling capacitor must be able to handle voltages equal to: Vin_max. mV240Vin_max%1ΔVcp - The peak−to−peak voltage across the capacitor. if else I L2_peak max_I Lpeak I L1_peak max_I Lpeak I L2_peak I L1_peak f sw D max ΔV cp I out_max C cp μF149.5098Ccp It is recommended to use a ceramic capacitor to keep the ESR losses as small as possible. 17 Apr 2023 04:37:43 - Mosfet TL494 - 2N22222,2N2907.sm 2 / 5 max_I Lpeak ΔV cp ESR mΩ15.2ESR Output Capacitor Choice The ripple caused by the discharge of the output capacitor while the inductor is charging is dictated by: mV300Vout_max%1ΔVout f sw D max ΔV out I out_max C out μF119.6078Cout I L2_peak I L1_peak ΔV out ESR mΩ12.809ESR Input Capacitor The input capacitor sees moderately low RMS current thanks to the input inductor. The RMS current in the input capacitor is given by: A1.5193 12 ΔI L I Cin_rms UC3843 PARAMETERS Transistor INRFZ44N ns100tr nC63Qt V12VG Ω0Rout_DriverIC t r Q t I G A0.63IG mA6.3fswQtIGG R out_DriverICI G V G R G Ω19.0476RG Transistor Drive V12VCC VCCVout_TL494 A0.63IGIC2 choose -> 2N2222, 2N2907 mA63 10 I C2 I B2 for V0.21VCE2 must be ---> mA63IB2IC1 choose -> 2N2222 mA6.3 10 I C1 I B1 ---> V0.07VCE1 I C1 V CE1 V CC R C Ω189.3651RC I B1 V CE1 V out_TL494 R B Ω1893.6508RB Rsense Calculation 2 ΔI L I FET_peak V 1R mΩ38.3838R 17 Apr 2023 04:37:43 - Mosfet TL494 - 2N22222,2N2907.sm 3 / 5 Feedback Resistor Calculator 2 V ref V R2V5Vref kΩ5.6R2 kΩ5.6R1fix Voltage Positive Output Voltage R 21V R2 V out_max R 1 kΩ61.6R1 if kΩ50R1 Negative Output Voltage R 2V R2 V out_max R 1N kΩ67.2R1N Ponteciometer calculation if kΩ0Rpot kΩ5.6RpotR2R2var kΩ55.6R1fixRpotR1R1var V27.3214 R 2var R 1var 1VR2Vout_min_max R 1fixIn FIG.36 R8 is ( + Rpot) in serie. Current kΩ1R1 R 1V1 V1Vref R 2 kΩ4R2 Soft Start and Dead Time The soft-start time generally is in the range of 25 to 100 clock cycles. If 50 clock cycles at a f-kHz switching rate is selected, the soft-start time is: t f sw 1 t kΩ1 10 R T R 6 V0.4545VrefR 6 R T R 6 V r6 μF0.25 R 6 t 25C2 ms0.25C2R6 ms0.25 f sw 1 25 17 Apr 2023 04:37:43 - Mosfet TL494 - 2N22222,2N2907.sm 4 / 5 The outline schematic is shown in FIG. 1 17 Apr 2023 04:37:43 - Mosfet TL494 - 2N22222,2N2907.sm 5 / 5