Chegg Solutions for Microelectronic Circuits (Adel S Sedra, Kenneth C Smith) (Z-Library)_parte_591

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Step 1 of 11 5.015E Consider input voltage, Therefore gate voltage both zero Under this condition output voltage the zero. Therefore gate source voltage for both transistor Both MOSFETs are OFF state and no drain current flowing through the circuit =0mA Therefore =0V drain current two and output voltage are 0mA 0V Step Consider input voltage +2.5V For NMOS ransistor gate and are the same For NMOS transistor take saturation condition Substitute for and Condition satisfied hence NMOS transistor saturation condition Step Positive gate voltage applied for PMOS transistor hence in OFF state At condition modified circuit G Figure Step Equation drain current NMOS transistor is Step Apply Kirchhoffs voltage law the output circuit From Figure Now above equation becomes Substitute value Solutions above equation are =0.000104322A 0.000215678A Therefore drain current NMOS transistor 0.10432mA Step =1.0432V Therefore for =+2.5V drain current MOSFETs output voltage are 0mA 1.04V Step Consider the input -2.5V For PMOS ransistor gate and drain same potential For PMOS take saturation condition Substitute =0 and values the above equation Co dition hence PMOS transistor satu condition Step 11 Negative gate voltage applied NMOS transistor, hence OFF state =0mA At condition modified circuit G kΩ -2.5 V V Figure 2 Step Equation drain current NMOS transistor (2) Step Apply Kirchhoffs voltage law the output circuit above circuit Now above equation becomes Substitute Solutions above equation -0.000104322A -0.000215678A Step 11 of 11 Therefore drain current of PMOS transistor Output Therefore drain MOSFETs output voltage are 0mA and -0.104mA