Chegg Solutions for Microelectronic Circuits (Adel S Sedra, Kenneth C

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Step 1 of 2 16.006E Refer to Figure 15.12 in the textbook for the CMOS SRAM memory cell. For technology, The upper bound on in terms of is, Substitute 4 for , 0.5 V for and 1.8 V for VI Thus, the upper bound on is, Step 2 of 2 Substitute 2.5 for in the equation. Therefore, the maximum allowable value of is, For minimum area, the width should be minimum. Here, the minimum allowable width is 0.18 Thus, for minimum area select, =