Digital Design_ Principles and Practices, Chegg Solution Manual_parte_216

Prévia do material em texto

Step 1 of 1 6.12DP Refer Figure X6.9 and Table 6.2 in text book. Propagation delay is the summation of time a gate takes to reflect the change of voltage level (logic level) at the output side for a corresponding change at the input side and the time delay caused by the signal path. Here 74HCT02's (U1) output will remain at the same constant level (1's) irrespective of the value of IN bit as one of the input is at logic level 0's. The constant output (1's) of U1 gate is feeding to the input of gates U2 which produces the constant output '1' according to the input, as one of the input of the U2 gates are Thus, we have seen there is a constant output irrespective of the value of IN bit. It means there is no transition propagation delay. Thus, the propagation delay of this circuit is zero.