Prévia do material em texto
Step 1 of 1 8.074E Refer to the ABEL program from Table 8-32 in the textbook. Consider that the phases are always at least 2 clock ticks long, even if RESTART asserts at the beginning of phase. Modify the program in Table 8-32: module TIMEGEN6 title Master Timing Generator' " Input and Output pins MCLK, RESET, RUN, RESTART pin; istype 'reg'; " State definitions TSTATE = SRESET = [1,1,1,1,1,1,1] P1S = P2F P3F = [1, 1, 1,0,0,1,1]; P3S P4F = [1, 1, 1, 1, 0, 0, 1]; P5F P6S equations TSTATE.CLK = MCLK; When RESET then TSTATE :=SRESET; state_diagram TSTATE state SRESET: if RESET then SRESET else P1F; state P1F: if RESET then SRESET else if RESTART then P1F else if RUN then P1S else P1F; state P1S: if RESET then SRESET else if RESTART then P1F else if RUN then P2F else P1S; state P2F: if RESET then SRESET else if RESTART then P1F else if RUN then P2S else P2F; state P2S: if RESET then SRESET else if RESTART then P1F else if RUN then P3F else P2S; state P3F: if RESET then SRESET else if RESTART then P1F else if RUN then P3S else P3F; state P3S: if RESET then SRESET else if RESTART then P1F else if RUN then P4F else P3S; state P4F: if RESET then SRESET else if RESTART then P1F else if RUN then P4S else P4F; state P4S: if RESET then SRESET else if RESTART then P1F else if RUN then P5F else P4S; state P5F: if RESET then SRESET else if RESTART then P1F else if RUN then P5S else P5F; state P5S: if RESET then SRESET else if RESTART then P1F else if RUN then P6F else P5S; state P6F: if RESET then SRESET else if RESTART then P1F else if RUN then P6S else P6F; state P6S: if RESET then SRESET else if RESTART then P1F else if RUN then P1F else P6S; end TIMEGEN6 Thus, the program in Table 8-32 is modified for the specified requirement.