A_low_cost_high_stability_microcontroller_compensated_crystal_oscillator

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1998 IEEE INTERNATIONAL FREQUENCY CONTROL SYMPOSIUM 
A LOW COST HIGH STABILITY MICROCONTROLLER COMPENSATED 
CRYSTAL OSCILLATOR 
N. Scott Deno, Center for Design and Computing, Pennsylvania State University, University Park, PA 
Chad L. Hahnlen, Center for Design and Computing, Pennsylvania State University, University Park, PA 
David L. Lundis, Center for Design and Computing, Pennsylvania State University, University Park, PA 
Peter G. Chin, Murata Electronics, Crystal Oscillator Division, State College, PA 
John K. Switalski, Murata Electronics, Crystal Oscillator Division, State College, PA 
ABSTRACT 
A Microcontroller Compensated Crystal Oscillator 
(MCXO) is described that incorporates varactor 
compensation techniques and high precision analog-to- 
digital and digital-to-analog converters. The analog 
circuit design and microcontroller hardware are similar to 
that previously reported [l], preserving the low cost, small 
size, and low power consumption. Design enhancements 
are reported which improve stability and spurious noise 
characteristics and add a “run-time’’ continuous calibration 
feature. Temperature stability is improved through 
firmware enhancements that better utilize the capabilities 
of the MCXO, resulting in measured performance of k 0.1 
ppm from minus 40 to plus 85°C. Improvements in the 
decoupling between digital and analog circuits reduced 
spurious noise to below -85dbC and phase noise to 
-13OdbC at 100Hz. A component level thermal analysis 
identifies those areas of the design that are most sensitive 
to thermal gradients. Analytical results are presented 
which indicate that component level temperature 
gradients, and differences in component thermal time 
constants, are dominant sources of “run-time’’ frequency 
error. Thermal packaging and calibration temperature 
protocol improvements are described which reduce 
differences in thermal gradients between calibration and 
run-time operating modes. Finally, modifications to the 
microcontroller firmware are described that support 
compensation for aging. This aging compensation can be 
continuous or periodic, where a typical implementation 
would re-calibrate automatically whenever a reference 
standard input signal is applied to the MCXO. 
0-7803-4373-5/98/$10.00 0 1998 EEE 
INTRODUCTION 
Analog Temperature Compensated Crystal Oscillators 
(TCXO’s) traditionally use a thermistor network and a 
varactor to stabilize the final oscillator frequency over 
temperature [2]. This paper describes improvements in 
TCXO frequency stability obtained by replacing the 
traditional passive compensation network with a 
microcontroller-based subsystem [l] . Thermal error 
sources are lumped together and effectively 
compensated by minimizing any configuration 
differences between calibration and normal operating 
modes. Analysis and control of each potential error 
source is a key to achieving the desired thermal stability 
of H.1 ppm from minus 40 to plus 85°C. 
Design size, power consumption, and cost were 
minimized through the use of commercially available 
state-of-the-art components for the microcontroller, 
non-volatile memory, Analog-to-Digital Converter 
(ADC), and Digital-to-Analog Converter (DAC). The 
package footprint is as previously reported: 1 inch by 1 
inch with a power consumption of 125 milliwatts [l]. 
Phase noise and spurious noise can be a significant 
problem for oscillators that use digital compensation 
techniques. Microcontrollers can generate a wide 
spectrum of unwanted frequencies that must be 
controlled using traditional design techniques. Physical 
separation of analog oscillator and microcontroller 
circuits onto opposite sides of a PCB with embedded 
ground planes helps to reduce radiated and coupled 
noise effects. Extensive power supply decoupling 
circuits are also needed to reduce the effects of 
conducted noise. 
Aging can be controlled by an automatic re-calibration 
algorithm in firmware. This optional algorithm phase 
locks to an external 1 Hz reference when available. The 
reference can be applied continuously or periodically to 
permanently correct the effects of oscillator aging. 
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BACKGROUND 
Precise thermal stabilization of TCXO’s is limited by the 
resistor networks used to generate varactor tuning voltages 
for crystal frequency compensation [2]. Several authors 
have suggested design alternatives that replace the 
resistor network with a digital subsystem [3-111. The 
method of dual mode Microcontroller Compensated 
Crystal Oscillators (MCXO) has been commonly used 
[3,4]. It has the advantage of deriving the temperature of 
the crystal directly from the characteristics of the crystal 
itself. Dual mode MCXO designs commonly adjust their 
output frequency by direct digital frequency synthesis. 
The resulting performance improvement is accompanied 
by cost increases due to additional digital components, 
replacement of the AT-cut crystal with an SC-cut, and 
additional labor required during manufacture [5 ] . Other 
authors have proposed a more direct replacement of the 
resistor network with a digital subsystem that measures 
temperature and outputs a compensation voltage [6, 7, 81. 
This method typically measures temperature, converts 
temperature to a digital value, translates the digital ADC 
value to a DAC compensation value, and converts this 
value to a varactor compensation voltage. Reported 
techniques vary significantly in the precision of the 
temperature measurement and compensation output value, 
as well as the sophistication of the translation algorithms 
[9, 10, 111. 
The approach described here replaces the resistor 
compensation network with a digital subsystem. Reduced 
cost and increased ease of manufacture is traded off 
against the inherent accuracy of the more expensive dual 
mode MCXO. The basic design features a high 
performance microcontroller, 16-bit ADC and DAC 
subsystems, and a 16Kbit calibration table [l]. In 
recognition of the presence of numerous uncontrollable 
error sources, this 16-bit precision in conversion and 
internal computations is well beyond the minimum 
required to effectively eliminate these sources of error [6]. 
The inherent temperature stability of a design will 
ultimately be determined by its sensitivity to all thermal 
error sources. A key to improving frequency stability lies 
in correctly analyzing and evaluating temperature 
variations and sensitivities. To address this issue, a 
detailed component-by-component thermal analysis was 
performed and is presented later in this paper. 
MCXO DESIGN CHARACTERISTICS 
A simplified block diagram of the MCXO design is shown 
in Figure 1. A standard Colpitts oscillator circuit is used 
with an AT cut crystal. The control input to the Colpitts 
circuit is a varactor compensation voltage generated by 
the microcontroller through the DAC [l]. 
A 
EEPROM Filter 
Oscillator 
Buffer Circuit Diode 
El Voltage Regulator 
Figure 1. MCXO Block Diagram 
Temperature is measured using a thermistor, and the 
ADC converts each reading to a 16-bit digital value. 
Non-volatile memory (EEPROM) is used to store 
temperature calibration data. The microcontroller 
compensates for temperature by calculating a 16-bit 
DAC control value based on the temperature 
measurement and the corresponding stored calibration 
data. The MCXO circuit and PCB layout are designed 
to isolate the digital circuitry from the analog circuitry 
both physically and electrically. The analog circuitry is 
located on one side of the PCB while the digital 
circuitry is located on the other side. In the prototype 
design, separate analog ground and digital ground 
planes were employed as the center two layers of a 6- 
layer PCB. 
Calibration of the MCXOdesign requires no 
substitution or “trimming” of components. Once the 
appropriate tuning voltage for a particular temperature 
is determined, the thermistor reading and the 
corresponding DAC value are stored in EEPROM 
memory. During normal operation, 16-bit linear 
interpolation is used to determine the appropriate DAC 
value required to maintain the desired output frequency 
over the entire operating temperature range from -40 to 
+85”C. The calibration table firmware implementation 
allows points to be set at any temperature. Thus, the 
interval between points can be adjusted to give the best 
fit to the crystal’s frequency versus temperature curve. 
The data reported here is consistent with previously 
reported results, where calibration points are equally 
spaced in the table [l]. However, the number of 
calibration points in the current design has been 
increased from 27 to 136. 
Operation of the microcontroller can be controlled 
remotely through a serial interface. Each MCXO unit 
has a single pin that provides serial communication with 
a host computer during calibration. Firmware in the 
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oscillator allows the host system to read thermistor and 
DAC values, tune the DAC voltage, and write to and read 
from the EEPROM memory. This pin is also used as the 
external reference signal input during normal operation to 
support continuous re-calibration. 
ERROR SENSITIVITY ANALYSIS 
In order to understand the fundamental performance limits 
of an MCXO, all major sources of frequency instability 
must be considered. Since these errors are additive, 
individual errors must be controlled to a level well beyond 
the performance goals of the MCXO design [l] . There are 
two major factors that contribute to frequency instability 
over temperature: errors caused by differences between 
calibrating and operating conditions, and fundamental 
limits on repeatability (true hysteresis, aging etc.). For 
stability in the O.lppm range and below, a thorough 
understanding of those errors caused by differences 
between calibration and operation is essential. During 
calibration of the MCXO, a nearly uniform temperature is 
assumed to exist within the oscillator package and this 
temperature is measured with a single thermistor. One 
major source of frequency instability is small temperature 
differentials between oscillator components that can not be 
accounted for during calibration. Additional errors can 
develop due to external temperature transients that affect 
individual circuit components differently. For calibration 
and operating transients which are not identical, thermal 
lags between components will cause apparent thermal 
hysteresis [2,4]. 
Temperature Measurement 
A key to MCXO stability clearly lies in the ability to 
obtain a repeatable and precise temperature measurement 
within the oscillator package. Cost constraints dictate that 
our MCXO use a single thermistor to measure 
temperature. To ensure measurement accuracy, this 
thermistor must be well coupled to all critical circuit 
components within the oscillator package, including the 
crystal [2]. When there is poor thermal coupling, or when 
internal temperature slew rates differ between calibration 
and operation, thermal lags will develop between the 
temperature sensor and the crystal. These thermal lags are 
the primary cause of apparent hysteresis [2]. 
The internal MCXO circuitry should be isolated from the 
external ambient environment to minimize these thermal 
lag errors [2]. Furthermore, the thermistor should be 
positioned as close to the crystal as possible, and all 
critical components should be tied together thermally (e.g. 
with a thermal epoxy). These steps together will help to 
mitigate the effects of apparent hysteresis. However, even 
with good thermal packaging there are still many factors 
which contribute to apparent thermal hysteresis. For 
example, the compensation lag time that occurs 
between temperature measurement and updating of the 
oscillator output frequency introduces an apparent 
hysteresis. Power dissipation by active circuitry causes 
component heating and apparent hysteresis can be 
introduced when the operating supply voltage is not 
identical to the voltage supplied during calibration. 
Each of these effects will induce small amounts of 
frequency error as will be explained in the following 
sections. 
Digital quantization of temperature represents another 
potential source of error. Prior work has shown that for 
frequency stability levels on the order of 0.1 to 0.5 ppm, 
16-bits is a reasonable thermistor resolution 
requirement [l]. For digital compensation, every 16-bit 
temperature calibration value must correspond to a 
unique address in EEPROM memory, and this forces 
the 16-bit thermistor ADC values to be monotonic with 
temperature. However, linearity is not a requirement 
[6], and for the non-linear temperature sensor described 
previously [l] , the corresponding temperature 
measurement resolution is as shown in Figure 2. 
Figure 2. Temperature Measurement Resolution 
The 16-bit ADC temperature measurements are 
monotonic, but not necessarily linear, with temperature. 
Since the crystal characteristics will be non-monotonic 
over the same -40 to +M°C temperature range, a 1 LSB 
change in ADC value will be mapped to a unique 
change in DAC value which depends on the slope of the 
crystal curve. For typical 3d order crystal data and our 
particular non-linear thermistor, the frequency shift 
induced by 1 ADC LSB is shown Figure 3. As seen in 
this figure, the effects of 1 ADC LSB is largest at the 
MCXO temperature extremes. 
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-..- - 
Tompuftun (dmgru C) 
Figure 3. Frequency Shift per ADC LSB 
Varactor Tuning 
For a conventional varactor tuned design, the oscillator 
frequency varies with the inverse of tuning load 
capacitance according to Equation (1) for intrinsic crystal 
capacitance's CO and C1 [12]. In the Colpitts oscillator 
circuit, the load capacitance CL varies in the same 
direction as the varactor capacitance (C,,) with the 
equation for CL given by Equation (2). In this equation, C, 
and L, represent the series capacitance and inductance 
around the oscillator circuit loop and C, represents any 
capacitance in parallel with the varactor (including PCB 
trace effects). Equation (3) shows the inverse relationship 
that exists between the varactor capacitance and tuning 
voltage generated by the microcontroller (VDAC) where K 
and n are constants defining the varactor characteristics 
~ 3 1 . 
Af / f,, C1 / 2 (G+C,) (1) 
a(Af / fRom)/acL = - C] / 2 (c, + c')2 
CL = c) + [c;' + (Cv, + c,)-' - dL,l-' (2) 
a c d a c v , = acl.Jacp 
= 1 l [(C,' - 02L,)*(C,, + C,) + l] 2 
aC&C, = 1 / [((CV, + - dL,)*C, + 112 
aCJdL, = o2 / [c;' + (c"= + c,)-] - 3L,J2 
XJaO = 2oL, / [C,-' + (C, + c$- dLJ2 
a typical value of oscillator circuit capacitance (C, = 
33pf), simulation reveals that a 0.1% (k33fF) 
uncertainty in the value of C, produces at least 0.13 
ppm error over most of the industrial temperature range. 
The error drops to approximately 0.006 ppm provided 
that C, maintains stability within 0.005% (k1.65fF). 
In addition to variations in C,, C,, and L,, which may 
occur between calibration and operation of the MCXO, 
varactor temperature stability represents another source 
of error. The temperature sensitivity of the varactor 
capacitance is given by Equation 4, which is a curve fit 
to the manufacturer's data. From this equation, it can 
be seen that the varactor capacitance (C,,) is more 
sensitive to temperature (T) variabilitywhen the applied 
DAC voltage (VDAC) is IOW. 
&Ac,&,,)/aT 807 * V D A C - ~ . ~ ~ ~ (4) 
From Equations 1-3 it is clear that as DAC voltage 
decreases, frequency also decreases. During oscillator 
calibration, this implies that small DAC tuning voltages 
must be applied at temperatures where the 
uncompensated crystal frequency is high. In the 
extreme case (at the lower turning point temperature of 
the crystal) the required DAC tuning voltage is the 
lowest and varactor temperature sensitivity the greatest. 
For typical values of CO, Cl, C,, C,, and L,, Figure 5 
shows the frequency error that is introduced per degree 
C of varactor temperature uncertainty. As seen in the 
figure, the worst case error that will typically occur due 
to varactor temperature uncertainty is 0.065ppmPC. 
Under ideal conditions, the tuned oscillator frequency will 
depend only on the VDAC that was determined through 
calibration. All other intermediate impedances (C,,, C,, 
L,, CL, etc.) in Equations 1-3 must be made as insensitive 
as possible to variations in operating conditions between 
calibration and run-time. In practice, part of the net series 
capacitance C, includes PCB trace capacitance, which is 
known to be sensitive to moisture variations [ 12,131. For 
Figure 5. Frequency Error Introduced per Degree C of 
Varactor Temperature Uncertainty 
The previous analysis has dealt solely with the effects 
of variations in circuit capacitance on MCXO stability. 
The next major contributor to frequency instability is 
uncertainties in DAC voltage for a fixed DAC word. 
Assuming that the DAC word value is determined 
appropriately for a given temperature, we are interested 
in looking at uncertainties that may develop in the 
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digital-to-analog conversion process. DAC output voltage 
precision is limited by the ability to maintain a stable 
reference voltage. This, in turn, relates to the power 
supply sensitivity of the MCXO design. Since calibration 
power supply levels can not be guaranteed to exactly 
match user power supply levels during operation, the DAC 
output voltage must be regulated within the design itself. 
Our MCXO design uses a temperature-stable zener to 
guarantee stable DAC output voltage levels. The worst 
case output voltage stability of the zener regulator is 
klOOppmPC. For a 5V regulator, this translates into a 
worst case voltage uncertainty of t500pVPC. With our 
16-bit DAC and output voltage regulated between 0 and 
5V, 1 DAC LSB represents 76.29~V. The frequency shift 
introduced by this voltage over the entire temperature 
range is shown in Figure 6. Returning to the worst case 
voltage reference stability of k500pVPC, this is 
equivalent to f6.55 LSBPC and translates into a peak 
frequency error of approximately 0.01 15 p p d C at the 
lower turning point temperature of the crystal. 
^y 
I l 
0.WlS 
0.0011 
B B B ( . : : : : : : : : 
-40 -30 -20 -10 0 10 x ) 30 40 50 60 70 80 
Turpvr tu- (W- C) 
Figure 6. Frequency Error per DAC LSB 
In addition to temperature uncertainty effects on the DAC 
voltage reference input, temperature uncertainties at the 
DAC itself are another potential source of error. The worst 
case uncertainty in DAC output voltage for a fixed 
reference and supply voltage is k25pVPC. This is a factor 
of 10 better than the worst case effect due to temperature 
uncertainties at the DAC voltage reference. 
Another contributing factor to DAC output voltage 
uncertainty is the power supply rejection of the DAC 
itself. While the DAC output voltage must be regulated to 
ensure consistency between calibration and operation for a 
given DAC word, the DAC power supply itself is taken 
directly from the MCXO oscillator 5V supply. With 
typical DAC power supply rejection of 500pVN, the 
effects of a 1V difference in power supply voltage 
between calibration and operation is the same as the error 
introduced by a l0C uncertainty in the temperature of the 
DAC output reference. Our design requires operating 
power supply voltages within S% of 5V (4.75 to 
5.25V). Thus, a k0.25V supply uncertainty translates 
into less than 2 LSB of uncertainty in the DAC output 
voltage (4.003 ppm max. error). 
In addition to differences in varactor voltage and circuit 
capacitance that may occur between calibration and 
operation of the MCXO, the rate at which the varactor 
voltage is updated also effects frequency stability. One 
major contributing factor to this lag is the operation of 
the microcontroller which has to continuously measure 
16-bit ADC values, read EEPROM memory, and then 
apply interpolation to generate new DAC voltages. 
Clearly this process takes finite time to complete, and 
the temperature value used to tune the crystal will 
always lag behind the crystal temperature present when 
the varactor voltage is updated. Thus, update lag can be 
a major contributing factor to apparent hysteresis in 
oscillator designs which use digital compensation. 
To mitigate the effects of varactor update lag on 
frequency stability, it is essential that microcontroller 
operation be as efficient as possible, and that the 
temperature inside the oscillator package change as 
slowly as possible. In our current MCXO design, the 
average combined temperature measurement and 
interpolation cycle executes in 220ms. Additional delay 
in the MCXO arises due to the two pole-RC filter on the 
DAC voltage output. This filter is required to provide 
sufficient isolation between the analog and digital 
portions of the design. Allowing for the 2s delay 
through the filter, the effective varactor update period is 
2.22s. Under these conditions, the amount of 
temperature error that can accumulate during 2.22s was 
computed for various temperature slew rates inside the 
oscillator package. Figure 7 shows the results obtained 
by using the known crystal characteristics to convert 
this temperature error into the corresponding frequency 
error. Note that for negative temperature slew rates 
relative to calibration, the error becomes positive for 
mid-range temperatures. 
E 0 . 2 
n 
n - 
e 0.1 
YI 
- 0 . 2 
+ I O l 
-0.3 
. 4 0 - 3 0 - 2 0 - 1 0 0 1 0 2 0 30 4 0 5 0 6 0 7 0 8 0 
T * m p * r a t u r * (Dapr* *s C ) 
Figure 7. Effects of a Compensation Lag 
(-5, + l , +5, + l0 degree C h i n ) 
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Interpolalion 
Calibration table interpolation introduces another 
potential source of frequency error in the MCXO. While 
there are many different linear and non-linear interpolation 
algorithms available for use in the MCXO [14], we chose 
to use linear interpolation for its simplicity. Using known 
3d order crystal characteristics [l], the frequency error 
which results from applying linear interpolation to the 
corresponding set of 16-bit ADC and DAC values is 
shown in Figure 8. From this plot it is clear that 
decreasing the calibration point spacing improves 
interpolation performance, at the expense of requiring 
additional EEPROM memory. Using currently available 
16Kbit serial EEPROM’s, calibration point spacing can be 
decreased to 0.25OC. 
these time references appear as a 1 Hz signal, which is 
the standard adopted. 
Our MCXO firmware has been designed for three 
operating modes: factory calibration, normal operation 
without continuous re-calibration, and normal operation 
with continuous re-calibration. The “normal without re- 
calibration” and “factory calibration” modes were 
previously described [l]. The “normal with continuous 
re-calibration’’ mode described in this section is 
currently underdevelopment. It is activated 
automatically when an external reference signal is 
verified to be present. 
From Figure 8 it is clear that for oscillators in the kO.1 
ppm stability range, calibration points must be spaced at 
most l0C apart to allow enough margin for cumulative 
errors. Note that tracking through crystal perturbations 
was not considered in this paper, and calibration point 
density must be significantly increased in regions with 
significant anomalous behavior. 
0.06 1, l l 
a 
- 0.04 
p 0.03 g . 
e 0.02 
ii 
0.01 
0 0 
c 
0 
U I - - - - --7 -T- --- 
-0.04 ‘ I I 
-40 -30 -20 -10 0 10 20 30 40 50 60 70 80 
Temperature (degree. C) 
Figure 8. Linear Interpolation Residuals 
(1 .O degree C interval - smaller deviations, 
2.5 degree C interval - larger deviations) 
CONTINUOUS REXALIBRATION 
Long-term oscillator aging has traditionally been 
controlled by use of components with low aging 
coefficients and through periodic re-calibration in the 
field. The increasing availability of low-cost time 
references, such as those derived from GPS satellites, 
provides another option that has been most commonly 
used in “holdover” oscillator applications [ 151. Many of 
Phase m Function Detector Control 
c y 
Temperature 
Correction I 
Microcontroller 
, I 
Oscillator 
Diode Circuit Buffer Output e 
Varactor L Colpitts G Output 
Figure 9. Continuous re-calibration subsystem block 
diagram 
The primary re-calibration subsystem elements are 
shown in Figure 9. When a 1Hz reference is applied to 
the phase detector, the phase detector accepts the signal 
as valid after verifying its period to be within 0.5% of 1 
Hz (based on the oscillator’s own frequency). After 
acceptance, the 1 Hz signal is measured for sufficient 
time to overcome the uncertainty of the external 
reference signal and the limited precision of the phase 
detector. After that acquisition measurement time, the 
reference signal period is again verified to be within 
0.5% of expected. If verification is successful, a phase 
error difference is calculated, integrated over time, 
added to the temperature correction, and then applied to 
the varactor control circuit. The control function has a 
transfer function which is only integral with a low 
forward gain. Gains of 1 or less are desirable to enable 
control to within the resolution of the output DAC. The 
GPS correction value may be optionally stored in 
EEPROM at any predetermined interval to make the re- 
calibration permanent. The GPS correction can be 
applied as multiple values applied to the calibration 
table value for current temperature or as a single value 
to correct all calibration table values. Current 
implementation applies a single correction value to all 
calibration points. This simplified single value approach 
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is based on the observation that the correction error should 
always be small. Also, other investigators’ data suggests 
that many aging mechanisms affect the oscillator 
frequency similarly over all temperatures [16]. 
The desired oscillator accuracy, the microcontroller’s 
phase detector precision, and the stability of the external 
reference determine the minimum GPS acquisition time 
period. For initial testing, a minimum control precision 
(MO) was selected as 350ppb. This is one-half the 
desired temperature coefficient stability specification. The 
microcontroller’s phase detector precision (Pu) is assumed 
to dominate over the stability of the external reference and 
thus becomes the remaining limiting factor. The phase 
detector precision is 400nsec for our microcontroller 
operating at 10MHz. The minimum measurement period 
is then: 
z = Pu / AFo = 400nsec / 50 x = 8 sec (5 ) 
Figure 10 shows the recovery response of the oscillator re- 
calibration algorithm from an initially forced frequency 
error. The first curve (starting at -0.4ppm) shows 
recovery with no control rate limiting. The second curve 
(starting at -0.25ppm) is control rate limited in firmware 
to lOppb/sec which controls unwanted algorithm induced 
phase noise. The actual stability, as shown in figure 10, is 
better than the selected minimum control precision 
(k5Oppb) for an 8sec phase detection interval. This 
favorable performance results by carrying phase 
information forward in the phase detector from the initial 
phase lock. 
Figure 10. Continuous Re-calibration Mode 
This method has the potential of correcting all frequency 
errors produced by both short and long term aging. 
Choices in the characteristics of the final implementation, 
such as continuous phase lock or frequency tracking, are 
varied and will depend upon target application 
requirements for the oscillator. A detailed discussion 
regarding tailoring of the algorithm implementation to 
specific applications is beyond the scope of this paper. 
EXPERIMENTAL RESULTS 
Frequency stability 
Frequency stability within k0.lppm over a temperature 
range from -40 to +85 degrees C has been achieved. 
Figure 11 shows a typical result for cold to hot and hot 
to cold temperature runs for one oscillator. For all 
temperature runs, the protocol began with a 60-minute 
“soak” time followed by a change of l-degree C every 2 
minutes. The entire testing process was automated as 
previously described [l]. Increasing the number of 
calibration points from 27 to as many as 136 
significantly reduced the impact of crystal 
perturbations. True crystal hysteresis has been reported 
by other investigators [16]. However, the hysteresis 
observed in Figure 11 can be entirely explained as 
apparent hysteresis following the analysis of 
temperature induced hysteresis presented earlier in this 
paper. 
0.2 
0.15 0.1 I t 
4.2 t 
Figure 11. Temperature profiles 
(bottom 2 curves are cold-to-hot and 
top 2 curves are hot-to-cold) 
Spurious response andphase noise 
Phase noise and other spurious response characteristics 
are an expected result when introducing a digital 
subsystem into an analog TCXO design. Our design 
effectively controls these noise sources using standard 
methods of physical and electrical isolation, shielding, 
and electrical decoupling. Spurious response levels in 
the oscillator output are at least 85 dB below the carrier. 
Phase noise characteristics, as measured with an 
HP3048A, are shown in Figure 12. 
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REFERENCES 
Figure 12. Phase Noise Measurement 
CONCLUSIONS 
Superior performance was obtained by replacing the 
conventional resistor network of a TCXO with a 
microcontroller based digital compensation subsystem. By 
using high precision programmable digital components we 
demonstrated improvements in temperature stability using 
AT cut crystals. The programmable nature of our digital 
design simplifies calibration, and the single pin serial 
control interface supports factory re-calibration and 
continuous re-calibration in the field. 
Increasing the number of calibration table points from 27 
to 136 extended the temperature stability performance to 
the limit of the current design. Based on our error 
analysis, accuracy of the current design is limited by the 
temperature measurement precision at the extreme 
temperatures (0.016 degrees C). Also, the apparent 
hysteresis (approx. 100ppb) shown in Figure l1 suggests 
that oscillator stability is currently limited by thermal 
design. Specifically, it is assumed that the hysteresis is 
primarily caused by temperature gradients within the 
oscillator. 
Oscillator redesign and repackaging efforts to reduce these 
limitations offer future performanceimprovements. 
Crystal perturbations may also limit future improvements 
in overall temperature stability. In the work reported here, 
selective placement of calibration points (in temperature) 
was avoided while significantly increasing the number of 
calibration points up to one per degree C. However, 
selective placement of calibration points as a means to 
control the effects of crystal perturbations is considered 
feasible and necessary, as further improvements in 
temperature stability are implemented. 
[l] S. Deno, C. Hahnlen, D. Landis, and R. Aurand. “A Low 
Cost Microcontroller Compensated Crystal Oscillator.” in 
Proc. 5P’Am. Symp. Freq. Cont.- pp 954-960, 1997. 
[2] R. Filler, “Measurement and Analysis of Thermal 
hysteresis in Resonators and TCXO’s.” in Proc. 42“d Ann. 
Symp. Freq. Cont., pp. 380-387, 1988. 
[3] A. Benjaminson, and S . Stallings, “A Microcomputer- 
Compensated Crystal Oscillator using Dual-Mode Resonator” 
in Proc. 43“ AM. Symp. Freq. Cont., pp. 20-26, 1989. 
[4] R. L. Filler, J. A. Messina, and V. J. Rosati, “Frequency- 
temperature and Aging Performance of Microcomputer- 
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