G1_R7_SISMICRO-1-23-15

Prévia do material em texto

<p>Sistemas Microprocessados</p><p>601 ;</p><p>602 ; Initialization: Address = EEADR, Data = EEDATA</p><p>603 ;</p><p>604 ; Output: none</p><p>605 ;</p><p>606 ;----------------------------------------------------------------------</p><p>607</p><p>608 DATA_EEPROM_WRITE</p><p>609</p><p>610 bsf STATUS, RP0 ; ---- Select Bank 1 -----</p><p>611</p><p>612 bsf EECON1, WREN ; EEPROM Write Enable: allow write cycles</p><p>613 ; bcf INTCON, GIE ; disable global interrupts</p><p>614 ; *** required sequence, do not alter ***</p><p>615 movlw 0x55</p><p>616 movwf EECON2</p><p>617 movlw 0xAA</p><p>618 movwf EECON2</p><p>619 bsf EECON1, WR ; initiate EEPROM write</p><p>620 ; *** end required sequence ***</p><p>621</p><p>622 btfsc EECON1, WR ; has write completed?</p><p>623 goto $-1</p><p>624</p><p>625 ; bsf INTCON, GIE ; enable global interrupts</p><p>626 bcf EECON1, WREN ; EEPROM Write Enable: inhibit write cycles</p><p>627</p><p>628 bcf STATUS, RP0 ; ---- Select Bank 0 -----</p><p>629</p><p>630 return</p><p>631</p><p>632</p><p>633 ;----------------------------------------------------------------------</p><p>634 ; Subroutine: READ_ANALOG_AN0</p><p>635 ;</p><p>636 ; Description: Read analog channel 0 (AN0).</p><p>637 ;</p><p>638 ; Constants: none</p><p>639 ;</p><p>640 ; Global Variables: none</p><p>641 ;</p><p>642 ; Initialization: none</p><p>643 ;</p><p>644 ; Output: ADRESH and ADRESL contain 10-bit A/D result justified</p><p>645 ; according to ADCON0, ADFM bit.</p><p>646 ;</p><p>647 ;----------------------------------------------------------------------</p><p>648</p><p>649 READ_ANALOG_AN0</p><p>650</p><p>651 bsf ADCON0, ADON ; Turn on ADC module</p><p>652</p><p>653 bcf ADCON0, CHS1 ; select analog channel AN0</p><p>654 bcf ADCON0, CHS0</p><p>655</p><p>656 ; After selecting a new channel, allow for sufficent sample time.</p><p>657 ; The amount of sample time depends on the charging time of the</p><p>658 ; internal charge holding capacitor (Section 7.2).</p><p>659</p><p>660 movlw D’6’ ; At 4 MHz, a 22 us delay</p><p>661 movwf TEMP ; (22us = 2us + 6 * 3us + 1us)</p><p>662 decfsz TEMP, F</p><p>663 goto $-1</p><p>664</p><p>665 bsf ADCON0, GO ; start A/D conversion</p><p>666</p><p>667 btfsc ADCON0, GO ; has A/D conversion completed?</p><p>Julho de 2022 15</p>